WARNING: line length of 85 exceeds 80 columns #34: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.c:558: + ste_ctx->set_actions_tx(ste_ctx, dmn, action_type_set, ste_ctx->actions_caps, WARNING: line length of 85 exceeds 80 columns #43: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.c:569: + ste_ctx->set_actions_rx(ste_ctx, dmn, action_type_set, ste_ctx->actions_caps, WARNING: line length of 87 exceeds 80 columns #519: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h:61: + DR_STE_V1_LU_TYPE_DONT_CARE = MLX5DR_STE_LU_TYPE_DONT_CARE, WARNING: line length of 94 exceeds 80 columns #537: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h:79: + DR_STE_V1_ACTION_INSERT_PTR_ATTR_NONE = 0, /* Regular push header (e.g. push vlan) */ WARNING: line length of 83 exceeds 80 columns #538: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h:80: + DR_STE_V1_ACTION_INSERT_PTR_ATTR_ENCAP = 1, /* Encapsulation / Tunneling */ WARNING: line length of 88 exceeds 80 columns #616: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h:159: +void dr_ste_v1_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_domain *dmn, WARNING: line length of 82 exceeds 80 columns #617: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h:160: + u8 *action_type_set, u32 actions_caps, u8 *last_ste, WARNING: line length of 88 exceeds 80 columns #621: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h:162: +void dr_ste_v1_set_actions_rx(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_domain *dmn, WARNING: line length of 82 exceeds 80 columns #622: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h:163: + u8 *action_type_set, u32 actions_caps, u8 *last_ste, WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #814: new file mode 100644 WARNING: line length of 90 exceeds 80 columns #858: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:40: +static const struct mlx5dr_ste_action_modify_field dr_ste_v2_action_modify_field_arr[] = { WARNING: line length of 90 exceeds 80 columns #860: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:42: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_SRC_L2_OUT_0, .start = 0, .end = 31, WARNING: line length of 91 exceeds 80 columns #863: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:45: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_SRC_L2_OUT_1, .start = 16, .end = 31, WARNING: line length of 86 exceeds 80 columns #866: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:48: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L2_OUT_1, .start = 0, .end = 15, WARNING: line length of 86 exceeds 80 columns #869: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:51: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L2_OUT_0, .start = 0, .end = 31, WARNING: line length of 87 exceeds 80 columns #872: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:54: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L2_OUT_1, .start = 16, .end = 31, WARNING: line length of 87 exceeds 80 columns #875: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:57: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L3_OUT_0, .start = 18, .end = 23, WARNING: line length of 87 exceeds 80 columns #878: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:60: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L4_OUT_1, .start = 16, .end = 24, WARNING: line length of 87 exceeds 80 columns #882: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:64: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L4_OUT_0, .start = 16, .end = 31, WARNING: line length of 86 exceeds 80 columns #886: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:68: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L4_OUT_0, .start = 0, .end = 15, WARNING: line length of 86 exceeds 80 columns #890: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:72: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L3_OUT_0, .start = 8, .end = 15, WARNING: line length of 86 exceeds 80 columns #894: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:76: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L3_OUT_0, .start = 8, .end = 15, WARNING: line length of 87 exceeds 80 columns #898: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:80: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L4_OUT_0, .start = 16, .end = 31, WARNING: line length of 86 exceeds 80 columns #902: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:84: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L4_OUT_0, .start = 0, .end = 15, WARNING: line length of 92 exceeds 80 columns #906: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:88: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV6_SRC_OUT_0, .start = 0, .end = 31, WARNING: line length of 92 exceeds 80 columns #910: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:92: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV6_SRC_OUT_1, .start = 0, .end = 31, WARNING: line length of 92 exceeds 80 columns #914: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:96: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV6_SRC_OUT_2, .start = 0, .end = 31, WARNING: line length of 92 exceeds 80 columns #918: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:100: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV6_SRC_OUT_3, .start = 0, .end = 31, WARNING: line length of 92 exceeds 80 columns #922: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:104: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV6_DST_OUT_0, .start = 0, .end = 31, WARNING: line length of 92 exceeds 80 columns #926: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:108: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV6_DST_OUT_1, .start = 0, .end = 31, WARNING: line length of 92 exceeds 80 columns #930: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:112: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV6_DST_OUT_2, .start = 0, .end = 31, WARNING: line length of 92 exceeds 80 columns #934: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:116: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV6_DST_OUT_3, .start = 0, .end = 31, WARNING: line length of 88 exceeds 80 columns #938: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:120: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV4_OUT_0, .start = 0, .end = 31, WARNING: line length of 88 exceeds 80 columns #942: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:124: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_IPV4_OUT_1, .start = 0, .end = 31, WARNING: line length of 90 exceeds 80 columns #946: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:128: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_GNRL_PURPOSE, .start = 0, .end = 31, WARNING: line length of 92 exceeds 80 columns #949: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:131: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_METADATA_2_CQE, .start = 0, .end = 31, WARNING: line length of 90 exceeds 80 columns #952: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:134: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_REGISTER_0_0, .start = 0, .end = 31, WARNING: line length of 90 exceeds 80 columns #955: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:137: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_REGISTER_0_1, .start = 0, .end = 31, WARNING: line length of 90 exceeds 80 columns #958: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:140: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_REGISTER_1_0, .start = 0, .end = 31, WARNING: line length of 90 exceeds 80 columns #961: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:143: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_REGISTER_1_1, .start = 0, .end = 31, WARNING: line length of 90 exceeds 80 columns #964: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:146: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_REGISTER_2_0, .start = 0, .end = 31, WARNING: line length of 90 exceeds 80 columns #967: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:149: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_REGISTER_2_1, .start = 0, .end = 31, WARNING: line length of 88 exceeds 80 columns #970: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:152: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_TCP_MISC_0, .start = 0, .end = 31, WARNING: line length of 88 exceeds 80 columns #973: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:155: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_TCP_MISC_1, .start = 0, .end = 31, WARNING: line length of 86 exceeds 80 columns #976: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:158: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_L2_OUT_2, .start = 0, .end = 15, WARNING: line length of 89 exceeds 80 columns #979: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:161: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_CFG_HDR_0_1, .start = 0, .end = 31, WARNING: line length of 89 exceeds 80 columns #982: FILE: drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h:164: + .hw_field = DR_STE_V2_ACTION_MDFY_FLD_CFG_HDR_0_0, .start = 0, .end = 15, total: 0 errors, 47 warnings, 0 checks, 903 lines checked NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace. Commit 011afeea1330 ("net/mlx5: DR, expand SWS STE callbacks and consolidate common structs") has style problems, please review. NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT BAD_REPORTED_BY_LINK CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF NOTE: If any of the errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS. total: 0 errors, 47 warnings, 0 checks, 903 lines checked