WARNING: line length of 81 exceeds 80 columns
#46: FILE: drivers/net/ethernet/mellanox/mlx5/core/dpll.c:191:
+#define __MLX5_DPLL_SSM_COMBINED_CODE(ssm_code, enhanced_ssm_code)		\

WARNING: line length of 81 exceeds 80 columns
#49: FILE: drivers/net/ethernet/mellanox/mlx5/core/dpll.c:194:
+#define MLX5_DPLL_SSM_COMBINED_CODE(type)					\

WARNING: line length of 81 exceeds 80 columns
#50: FILE: drivers/net/ethernet/mellanox/mlx5/core/dpll.c:195:
+	__MLX5_DPLL_SSM_COMBINED_CODE(MLX5_DPLL_SSM_CODE_##type,		\

WARNING: line length of 91 exceeds 80 columns
#100: FILE: drivers/net/ethernet/mellanox/mlx5/core/dpll.c:245:
+	NL_SET_ERR_MSG_MOD(extack, "Invalid clock quality level obtained from firmware\n");

total: 0 errors, 4 warnings, 0 checks, 90 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit 09f1e7c50c2e ("net/mlx5: DPLL, Add clock quality level op implementation") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT BAD_REPORTED_BY_LINK CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 4 warnings, 0 checks, 90 lines checked