WARNING: line length of 84 exceeds 80 columns #36: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:30: +#define NORMAL_MSE_LO_THRESH_MASK GENMASK(15, 8) /* NormMseLoThresh */ WARNING: line length of 86 exceeds 80 columns #39: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:33: +#define REMOTE_ACK_COUNT_LIMIT_CTRL_MASK GENMASK(2, 1) /* RemAckCntLimitCtrl */ WARNING: line length of 92 exceeds 80 columns #42: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:36: +#define VCO_SLICER_THRESH_HIGH_MASK GENMASK(23, 0) /* VcoSlicerThreshBitsHigh */ WARNING: line length of 94 exceeds 80 columns #45: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:39: +#define DFE_TAIL_EANBLE_VGA_TRHESH_1000 GENMASK(5, 1) /* DfeTailEnableVgaThresh1000 */ WARNING: line length of 84 exceeds 80 columns #48: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:42: +#define MRVL_TR_FIX_100KP_MASK GENMASK(22, 20) /* MrvlTrFix100Kp */ WARNING: line length of 84 exceeds 80 columns #49: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:43: +#define MRVL_TR_FIX_100KF_MASK GENMASK(19, 17) /* MrvlTrFix100Kf */ WARNING: line length of 85 exceeds 80 columns #50: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:44: +#define MRVL_TR_FIX_1000KP_MASK GENMASK(16, 14) /* MrvlTrFix1000Kp */ WARNING: line length of 85 exceeds 80 columns #51: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:45: +#define MRVL_TR_FIX_1000KF_MASK GENMASK(13, 11) /* MrvlTrFix1000Kf */ WARNING: line length of 85 exceeds 80 columns #57: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:51: +#define SLAVE_DSP_READY_TIME_MASK GENMASK(22, 15) /* SlvDSPreadyTime */ WARNING: line length of 84 exceeds 80 columns #58: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:52: +#define MASTER_DSP_READY_TIME_MASK GENMASK(14, 7) /* MasDSPreadyTime */ WARNING: line length of 84 exceeds 80 columns #64: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:58: +#define RESET_SYNC_OFFSET_MASK GENMASK(11, 8) /* ResetSyncOffset */ WARNING: line length of 86 exceeds 80 columns #67: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:61: +#define FFE_UPDATE_GAIN_FORCE_VAL_MASK GENMASK(9, 7) /* FfeUpdGainForceVal */ WARNING: line length of 83 exceeds 80 columns #77: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:71: +#define SS_TR_KP1000_MASTER_MASK GENMASK(15, 13) /* SSTrKp1000Mas */ WARNING: line length of 83 exceeds 80 columns #78: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:72: +#define SS_TR_KF1000_MASTER_MASK GENMASK(12, 10) /* SSTrKf1000Mas */ WARNING: line length of 83 exceeds 80 columns #79: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:73: +#define SS_TR_KP1000_SLAVE_MASK GENMASK(9, 7) /* SSTrKp1000Slv */ WARNING: line length of 83 exceeds 80 columns #80: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:74: +#define SS_TR_KF1000_SLAVE_MASK GENMASK(6, 4) /* SSTrKf1000Slv */ WARNING: line length of 87 exceeds 80 columns #84: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:78: +#define EEE1000_SELECT_SIGNEL_DETECTION_FROM_DFE BIT(4) /* Regsigdet_sel_1000 */ WARNING: line length of 88 exceeds 80 columns #87: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:81: +#define EEE1000_STAGE2_TR_KF_MASK GENMASK(13, 11) /* RegEEE_st2TrKf1000 */ WARNING: line length of 97 exceeds 80 columns #90: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:84: +#define SLAVE_WAKETR_TIMER_MASK GENMASK(20, 11) /* RegEEE_slv_waketr_timer_tar */ WARNING: line length of 95 exceeds 80 columns #91: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:85: +#define SLAVE_REMTX_TIMER_MASK GENMASK(10, 1) /* RegEEE_slv_remtx_timer_tar */ WARNING: line length of 98 exceeds 80 columns #94: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:88: +#define SLAVE_WAKEINT_TIMER_MASK GENMASK(10, 1) /* RegEEE_slv_wake_int_timer_tar */ WARNING: line length of 90 exceeds 80 columns #97: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:91: +#define TR_FREEZE_TIMER2_MASK GENMASK(9, 0) /* RegEEE_trfreeze_timer2 */ WARNING: line length of 85 exceeds 80 columns #100: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:94: +#define EEE100_LPSYNC_STAGE1_UPDATE_TIMER_MASK GENMASK(8, 0) /* RegEEE100Stg1_tar */ WARNING: line length of 98 exceeds 80 columns #103: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:97: +#define WAKE_SLAVE_TR_WAIT_DFE_DETECTION_EN BIT(11) /* REGEEE_wake_slv_tr_wait_dfesigdet_en */ WARNING: line length of 84 exceeds 80 columns #151: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:746: + __tr_set_bits(phydev, 0x1, 0xf, 0x18, ENABLE_RANDOM_UPDOWN_COUNTER_TRIGGER); WARNING: line length of 93 exceeds 80 columns #159: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:754: + FIELD_PREP(FFE_UPDATE_GAIN_FORCE_VAL_MASK, 0x4) | FFE_UPDATE_GAIN_FORCE); WARNING: line length of 85 exceeds 80 columns #186: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:792: + RESET_SYNC_OFFSET_MASK, FIELD_PREP(RESET_SYNC_OFFSET_MASK, 0x6)); WARNING: line length of 89 exceeds 80 columns #193: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:795: + VGA_DECIMATION_RATE_MASK, FIELD_PREP(VGA_DECIMATION_RATE_MASK, 0x1)); WARNING: line length of 85 exceeds 80 columns #228: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:863: + RESET_SYNC_OFFSET_MASK, FIELD_PREP(RESET_SYNC_OFFSET_MASK, 0x5)); WARNING: line length of 87 exceeds 80 columns #301: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:952: + __tr_clr_bits(phydev, 0x2, 0xd, 0x8, EEE1000_SELECT_SIGNEL_DETECTION_FROM_DFE); WARNING: line length of 83 exceeds 80 columns #324: FILE: drivers/net/phy/mediatek/mtk-ge-soc.c:975: + __tr_clr_bits(phydev, 0x2, 0xd, 0x25, WAKE_SLAVE_TR_WAIT_DFE_DETECTION_EN); WARNING: line length of 86 exceeds 80 columns #384: FILE: drivers/net/phy/mediatek/mtk-ge.c:48: + phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED_1, MTK_PHY_AUX_CTRL_AND_STATUS, WARNING: line length of 82 exceeds 80 columns #411: FILE: drivers/net/phy/mediatek/mtk-ge.c:66: + phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_MCC_CTRL_AND_TX_POWER_CTRL, WARNING: line length of 88 exceeds 80 columns #478: FILE: drivers/net/phy/mediatek/mtk-phy-lib.c:29: +static void __tr_read(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, WARNING: line length of 89 exceeds 80 columns #501: FILE: drivers/net/phy/mediatek/mtk-phy-lib.c:52: +static void __tr_write(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, WARNING: line length of 83 exceeds 80 columns #511: FILE: drivers/net/phy/mediatek/mtk-phy-lib.c:62: +void __tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, WARNING: line length of 81 exceeds 80 columns #525: FILE: drivers/net/phy/mediatek/mtk-phy-lib.c:76: +void tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, WARNING: line length of 94 exceeds 80 columns #534: FILE: drivers/net/phy/mediatek/mtk-phy-lib.c:85: +void __tr_set_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, u32 set) WARNING: line length of 94 exceeds 80 columns #540: FILE: drivers/net/phy/mediatek/mtk-phy-lib.c:91: +void __tr_clr_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, u32 clr) WARNING: line length of 83 exceeds 80 columns #567: FILE: drivers/net/phy/mediatek/mtk.h:68: +void __tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, WARNING: line length of 81 exceeds 80 columns #569: FILE: drivers/net/phy/mediatek/mtk.h:70: +void tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, WARNING: line length of 95 exceeds 80 columns #571: FILE: drivers/net/phy/mediatek/mtk.h:72: +void __tr_set_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, u32 set); WARNING: line length of 95 exceeds 80 columns #572: FILE: drivers/net/phy/mediatek/mtk.h:73: +void __tr_clr_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, u32 clr); total: 0 errors, 43 warnings, 0 checks, 525 lines checked NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace. Commit 38e20b2a9b13 ("net: phy: mediatek: Add token ring access helper functions in mtk-phy-lib") has style problems, please review. NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT BAD_REPORTED_BY_LINK CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF NOTE: If any of the errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS. total: 0 errors, 43 warnings, 0 checks, 525 lines checked