1:  eb81ac3805a7 ! 1:  8bcfbb5c8b32 wifi: rtw88: move the shared 88xxa init helpers into the core
    @@ Metadata
     Author: Luka Gejak <luka.gejak@linux.dev>
     
      ## Commit message ##
    -    wifi: rtw88: move the shared 88xxa init helpers into the core
    +    wifi: rtw88: move the 88xxa CCK power detect setter to phy.c
     
    -    The adaptive control, EDCA and CCK power detect helpers in rtw88xxa.c
    -    program values that are not specific to that chip family. The RTL8723B
    -    needs all three of them, which would make that chip select RTW88_88XXA
    -    and pull in a whole chip module for three helpers.
    +    The CCK power detect setter in rtw88xxa.c programs values that are not
    +    specific to that chip family. The RTL8723B wants the same setter, but
    +    pulling in the whole rtw88_88xxa module for one helper is not worth it.
     
    -    Move the CCK power detect setter to phy.c as rtw_phy_cck_pd_set(), where
    -    the rest of the CCK power detect code and the level enum already live,
    -    and the two MAC init helpers to mac.c as rtw_mac_init_adaptive_ctrl()
    -    and rtw_mac_init_edca(). The chips that need them call the core
    -    versions, so rtw88xxa.c no longer provides any of them.
    -
    -    The two REG_USTIME_* writes are not carried over. rtw88xxa_power_on()
    -    writes the same values a few lines later, and rtw_set_channel_mac()
    -    writes them again on every channel set, so the register state of the
    -    existing chips does not change.
    +    Move it to phy.c as rtw_phy_cck_pd_set(), where the rest of the CCK power
    +    detect code and the level enum already live. rtw8812a and rtw8821a call
    +    the core version, so rtw88xxa.c no longer provides it.
     
         Signed-off-by: Luka Gejak <luka.gejak@linux.dev>
     
    - ## drivers/net/wireless/realtek/rtw88/mac.c ##
    -@@ drivers/net/wireless/realtek/rtw88/mac.c: int rtw_mac_postinit(struct rtw_dev *rtwdev)
    - 
    - 	return chip->ops->mac_postinit(rtwdev);
    - }
    -+
    -+void rtw_mac_init_adaptive_ctrl(struct rtw_dev *rtwdev)
    -+{
    -+	rtw_write32_mask(rtwdev, REG_RRSR, 0xfffff, 0xffff1);
    -+	rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x3030);
    -+}
    -+EXPORT_SYMBOL(rtw_mac_init_adaptive_ctrl);
    -+
    -+void rtw_mac_init_edca(struct rtw_dev *rtwdev)
    -+{
    -+	rtw_write16(rtwdev, REG_SPEC_SIFS, 0x100a);
    -+	rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, 0x100a);
    -+
    -+	rtw_write16(rtwdev, REG_SIFS, 0x100a);
    -+	rtw_write16(rtwdev, REG_SIFS + 2, 0x100a);
    -+
    -+	rtw_write32(rtwdev, REG_EDCA_BE_PARAM, 0x005EA42B);
    -+	rtw_write32(rtwdev, REG_EDCA_BK_PARAM, 0x0000A44F);
    -+	rtw_write32(rtwdev, REG_EDCA_VI_PARAM, 0x005EA324);
    -+	rtw_write32(rtwdev, REG_EDCA_VO_PARAM, 0x002FA226);
    -+}
    -+EXPORT_SYMBOL(rtw_mac_init_edca);
    -
    - ## drivers/net/wireless/realtek/rtw88/mac.h ##
    -@@
    - 
    - void rtw_set_channel_mac(struct rtw_dev *rtwdev, u8 channel, u8 bw,
    - 			 u8 primary_ch_idx);
    -+void rtw_mac_init_adaptive_ctrl(struct rtw_dev *rtwdev);
    -+void rtw_mac_init_edca(struct rtw_dev *rtwdev);
    - int rtw_pwr_seq_parser(struct rtw_dev *rtwdev,
    - 		       const struct rtw_pwr_seq_cmd * const *cmd_seq);
    - int rtw_mac_power_on(struct rtw_dev *rtwdev);
    -
      ## drivers/net/wireless/realtek/rtw88/phy.c ##
     @@ drivers/net/wireless/realtek/rtw88/phy.c: static void rtw_phy_cck_pd(struct rtw_dev *rtwdev)
      		chip->ops->cck_pd_set(rtwdev, level);
    @@ drivers/net/wireless/realtek/rtw88/phy.c: static void rtw_phy_cck_pd(struct rtw_
     +	static const u8 pd[CCK_PD_LV_MAX] = {0x40, 0x83, 0xcd, 0xdd, 0xed};
     +	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
     +
    -+	/* Override rtw_phy_cck_pd_lv_link(). It implements something
    ++	/*
    ++	 * Override rtw_phy_cck_pd_lv_link(). It implements something
     +	 * like type 2/3/4. We need type 1 here.
     +	 */
     +	if (rtw_is_assoc(rtwdev)) {
    @@ drivers/net/wireless/realtek/rtw88/rtw8821a.c: static const struct rtw_chip_ops
      	.set_gid_table		= NULL,
     
      ## drivers/net/wireless/realtek/rtw88/rtw88xxa.c ##
    -@@ drivers/net/wireless/realtek/rtw88/rtw88xxa.c: static void rtw88xxa_init_wmac_setting(struct rtw_dev *rtwdev)
    - 	rtw_write32(rtwdev, REG_MAR + 4, 0xffffffff);
    - }
    - 
    --static void rtw88xxa_init_adaptive_ctrl(struct rtw_dev *rtwdev)
    --{
    --	rtw_write32_mask(rtwdev, REG_RRSR, 0xfffff, 0xffff1);
    --	rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x3030);
    --}
    --
    --static void rtw88xxa_init_edca(struct rtw_dev *rtwdev)
    --{
    --	rtw_write16(rtwdev, REG_SPEC_SIFS, 0x100a);
    --	rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, 0x100a);
    --
    --	rtw_write16(rtwdev, REG_SIFS, 0x100a);
    --	rtw_write16(rtwdev, REG_SIFS + 2, 0x100a);
    --
    --	rtw_write32(rtwdev, REG_EDCA_BE_PARAM, 0x005EA42B);
    --	rtw_write32(rtwdev, REG_EDCA_BK_PARAM, 0x0000A44F);
    --	rtw_write32(rtwdev, REG_EDCA_VI_PARAM, 0x005EA324);
    --	rtw_write32(rtwdev, REG_EDCA_VO_PARAM, 0x002FA226);
    --
    --	rtw_write8(rtwdev, REG_USTIME_TSF, 0x50);
    --	rtw_write8(rtwdev, REG_USTIME_EDCA, 0x50);
    --}
    --
    - static void rtw88xxau_tx_aggregation(struct rtw_dev *rtwdev)
    - {
    - 	const struct rtw_chip_info *chip = rtwdev->chip;
    -@@ drivers/net/wireless/realtek/rtw88/rtw88xxa.c: int rtw88xxa_power_on(struct rtw_dev *rtwdev)
    - 	rtw_write32_mask(rtwdev, REG_CR, 0x30000, 0x2);
    - 
    - 	rtw88xxa_init_wmac_setting(rtwdev);
    --	rtw88xxa_init_adaptive_ctrl(rtwdev);
    --	rtw88xxa_init_edca(rtwdev);
    -+	rtw_mac_init_adaptive_ctrl(rtwdev);
    -+	rtw_mac_init_edca(rtwdev);
    - 
    - 	rtw_write8_set(rtwdev, REG_FWHW_TXQ_CTRL, BIT(7));
    - 	rtw_write8(rtwdev, REG_ACKTO, 0x80);
     @@ drivers/net/wireless/realtek/rtw88/rtw88xxa.c: void rtw88xxa_phy_pwrtrack(struct rtw_dev *rtwdev,
      }
      EXPORT_SYMBOL(rtw88xxa_phy_pwrtrack);
2:  c43213a50a9d < -:  ------------ wifi: rtw88: assign the RCR per chip in rtw_core_init
3:  0010f20a9681 ! 2:  94093a3e5729 wifi: rtw88: 8723b: add the RTL8723B register definitions
    @@ drivers/net/wireless/realtek/rtw88/reg.h
      #define REG_AGC_TABLE		0x0958
      #define REG_RFE_CTRL_E		0x0974
      #define REG_2ND_CCA_CTRL	0x0976
    +@@
    + #define REG_CCA_MF		0x0a20
    + #define BIT_MBC_WIN		GENMASK(5, 4)
    + #define REG_CCK0_TX_FILTER1	0x0a20
    ++#define REG_CCK_SWING		0x0a22
    + #define REG_CCK0_TX_FILTER2	0x0a24
    + #define REG_CCK0_DEBUG_PORT	0x0a28
    + #define REG_CCK0_FAREPORT	0x0a2c
     @@
      #define REG_RX_IQC_AB_A		0x0c10
      #define REG_RX_IQC_CD_A		0x0c14
4:  e6b90c92ad81 = 3:  bfcba33899a0 wifi: rtw88: 8723b: add the RTL8723B BB, RF and AGC tables
5:  2aae88059dc0 ! 4:  a5a2a0b11d30 wifi: rtw88: 8723b: add the RTL8723B chip driver
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +#define ADDA_ON_VAL_8723B			0x01c00014
     +
     +/*
    -+ * Same as the shared rtw8723x WLAN_RCR_CFG plus BIT_APP_FCS: rtw88
    -+ * advertises RX_INCLUDES_FCS for every chip, and without it mac80211
    -+ * trims four bytes of real frame data.
    -+ */
    -+#define WLAN_RCR_CFG_8723B		(BIT_APM | BIT_AM | BIT_AB | \
    -+					 BIT_CBSSID_DATA | BIT_CBSSID_BCN | \
    -+					 BIT_AMF | BIT_HTC_LOC_CTRL | \
    -+					 BIT_APP_PHYSTS | BIT_APP_ICV | \
    -+					 BIT_APP_MIC | BIT_APP_FCS)
    -+
    -+/*
     + * BIT(7) lets the 8051 control antenna selection, BIT(1) is LED2_CM.
     + */
     +#define WLAN_ANT_SEL			(BIT(7) | BIT(1))
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +};
     +
     +/* The eight per-rate CCK transmit power registers are consecutive. */
    -+#define REG_CCK_SWING		0x0a22
     +#define RTW_CCK_SWING_REG_NUM	8
     +
     +/*
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +	 * hardware free-page counters and leave TX DMA no pages to allocate.
     +	 */
     +	rtw_write16_set(rtwdev, REG_CR, MAC_TRX_ENABLE | BIT_MAC_SEC_EN |
    -+				       BIT_32K_CAL_TMR_EN);
    ++			BIT_32K_CAL_TMR_EN);
     +
     +	if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO)
     +		rtw_write16_set(rtwdev, REG_PWR_DATA,
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +
     +static void rtw8723b_init_adaptive_ctrl(struct rtw_dev *rtwdev)
     +{
    -+	rtw_mac_init_adaptive_ctrl(rtwdev);
    -+
     +	/*
     +	 * Firmware validates RRSR at init: narrowing it to the mandatory
    -+	 * rates makes it drop all management TX, so let the power save code
    -+	 * keep writing the full set back.
    ++	 * rates makes it drop all management TX, so keep the full set.
     +	 */
    ++	rtw_write32_mask(rtwdev, REG_RRSR, 0xfffff, 0xffff1);
     +	rtwdev->dm_info.rrsr_val_init = 0xffff1;
    ++	rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x3030);
     +}
     +
     +static void rtw8723b_init_edca(struct rtw_dev *rtwdev)
     +{
    -+	rtw_mac_init_edca(rtwdev);
    ++	rtw_write16(rtwdev, REG_SPEC_SIFS, 0x100a);
    ++	rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, 0x100a);
    ++	rtw_write16(rtwdev, REG_SIFS, 0x100a);
    ++	rtw_write16(rtwdev, REG_SIFS + 2, 0x100a);
     +
     +	/*
     +	 * RESP_SIFS must leave the AP enough slack, or it times out before the
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +	 */
     +	rtw_write16(rtwdev, REG_RESP_SIFS_CCK, 0x0808);
     +	rtw_write16(rtwdev, REG_RESP_SIFS_OFDM, 0x0a0a);
    ++
    ++	/* TXOP */
    ++	rtw_write32(rtwdev, REG_EDCA_BE_PARAM, 0x005EA42B);
    ++	rtw_write32(rtwdev, REG_EDCA_BK_PARAM, 0x0000A44F);
    ++	rtw_write32(rtwdev, REG_EDCA_VI_PARAM, 0x005EA324);
    ++	rtw_write32(rtwdev, REG_EDCA_VO_PARAM, 0x002FA226);
     +}
     +
     +static void rtw8723b_init_beacon_parameters(struct rtw_dev *rtwdev)
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +	/* Enable hardware sequence numbering for all queues. */
     +	rtw_write8(rtwdev, REG_HWSEQ_CTRL, 0xff);
     +
    -+	/* Enable Rx DMA timer masking: clear 0x0[2:0] and 0x2[15:0] only. */
    -+	val32 = rtw_read32(rtwdev, REG_SDIO_TX_CTRL);
    -+	val32 &= 0x0000fff8;
    -+	rtw_write32(rtwdev, REG_SDIO_TX_CTRL, val32);
    ++	if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) {
    ++		/*
    ++		 * Enable Rx DMA timer masking: clear 0x0[2:0] and
    ++		 * 0x2[15:0] only.
    ++		 */
    ++		val32 = rtw_read32(rtwdev, REG_SDIO_TX_CTRL);
    ++		val32 &= 0x0000fff8;
    ++		rtw_write32(rtwdev, REG_SDIO_TX_CTRL, val32);
    ++	}
     +
     +	rtw_write16(rtwdev, REG_ATIMWND, 0x2);
     +
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +
     +	rf_cfgch &= ~RFCFGCH_BW_MASK;
     +	rf_cfgch |= bw == RTW_CHANNEL_WIDTH_40 ? RFCFGCH_BW_40M :
    -+						  RFCFGCH_BW_20M;
    ++						 RFCFGCH_BW_20M;
     +
     +	/* The vendor driver programs both paths from the path A value. */
     +	rtw_write_rf(rtwdev, RF_PATH_A, RF_CFGCH, RFREG_MASK, rf_cfgch);
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +					      u32 ofdm_swing, u8 path)
     +{
     +	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
    -+	s32 ele_A, ele_D, ele_C, ele_A_ext;
    ++	s32 ele_a, ele_d, ele_c, ele_a_ext;
     +	s32 iqk_result_x;
     +	s32 iqk_result_y;
     +	s32 value32;
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +	}
     +
     +	/* new element D */
    -+	ele_D = OFDM_SWING_D(ofdm_swing);
    ++	ele_d = OFDM_SWING_D(ofdm_swing);
     +
     +	/* new element A */
     +	iqk_result_x = iqkxy_to_s32(iqk_result_x);
    -+	ele_A = iqk_mult(iqk_result_x, ele_D, &ele_A_ext);
    ++	ele_a = iqk_mult(iqk_result_x, ele_d, &ele_a_ext);
     +
     +	/* new element C */
     +	iqk_result_y = iqkxy_to_s32(iqk_result_y);
    -+	ele_C = iqk_mult(iqk_result_y, ele_D, NULL);
    ++	ele_c = iqk_mult(iqk_result_y, ele_d, NULL);
     +
     +	switch (path) {
     +	case RF_PATH_A:
     +	default:
     +		/* write new elements A, C, D, element B is always 0 */
    -+		value32 = BIT_SET_TXIQ_ELM_ACD(ele_A, ele_C, ele_D);
    ++		value32 = BIT_SET_TXIQ_ELM_ACD(ele_a, ele_c, ele_d);
     +		rtw_write32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, value32);
    -+		value32 = BIT_SET_TXIQ_ELM_C1(ele_C);
    ++		value32 = BIT_SET_TXIQ_ELM_C1(ele_c);
     +		rtw_write32_mask(rtwdev, REG_TXIQK_MATRIXA_LSB2_11N, MASKH4BITS,
     +				 value32);
     +		rtw_write32_mask(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, BIT(24),
    -+				 ele_A_ext);
    ++				 ele_a_ext);
     +		break;
     +
     +	case RF_PATH_B:
     +		/* write new elements A, C, D, element B is always 0 */
    -+		value32 = BIT_SET_TXIQ_ELM_ACD(ele_A, ele_C, ele_D);
    ++		value32 = BIT_SET_TXIQ_ELM_ACD(ele_a, ele_c, ele_d);
     +		rtw_write32(rtwdev, REG_OFDM_0_XB_TX_IQ_IMBALANCE, value32);
    -+		value32 = BIT_SET_TXIQ_ELM_C1(ele_C);
    ++		value32 = BIT_SET_TXIQ_ELM_C1(ele_c);
     +		rtw_write32_mask(rtwdev, REG_TXIQK_MATRIXB_LSB2_11N, MASKH4BITS,
     +				 value32);
     +		rtw_write32_mask(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, BIT(28),
    -+				 ele_A_ext);
    ++				 ele_a_ext);
     +		break;
     +	}
     +}
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +	reg_e94 = rtw_read32(rtwdev, REG_IQK_RES_TX);
     +	reg_e9c = rtw_read32(rtwdev, REG_IQK_RES_TY);
     +	val32 = 0x80007c00 | (reg_e94 & 0x3ff0000) |
    -+	((reg_e9c & 0x3ff0000) >> 16);
    ++		((reg_e9c & 0x3ff0000) >> 16);
     +	rtw_write32(rtwdev, REG_TXIQK_11N, val32);
     +
     +	rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path A RX IQK step2!\n");
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +
     +	rtw_dbg(rtwdev, RTW_DBG_RFK,
     +		"[IQK]0xc80 = 0x%x 0xc94 = 0x%x 0xc14 = 0x%x 0xca0 = 0x%x\n",
    -+	rtw_read32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE),
    ++		rtw_read32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE),
     +		rtw_read32(rtwdev, REG_TXIQK_MATRIXA_LSB2_11N),
     +		rtw_read32(rtwdev, REG_A_RXIQI),
     +		rtw_read32(rtwdev, REG_RXIQK_MATRIX_LSB_11N));
     +	rtw_dbg(rtwdev, RTW_DBG_RFK,
     +		"[IQK]0xcd0 = 0x%x 0xcd4 = 0x%x 0xcd8 = 0x%x\n",
    -+	rtw_read32(rtwdev, REG_TXIQ_AB_S0),
    ++		rtw_read32(rtwdev, REG_TXIQ_AB_S0),
     +		rtw_read32(rtwdev, REG_TXIQ_CD_S0),
     +		rtw_read32(rtwdev, REG_RXIQ_AB_S0));
     +
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +	struct rtw_hal *hal = &rtwdev->hal;
     +	s8 final_ofdm_swing_index;
     +	s8 final_cck_swing_index;
    -+	/* 8703b and 8723d seem to use RTW_CCK_SWING_TABLE_SIZE */
    -+	u8 limit_cck = 28; /* -2dB */
    ++	/*
    ++	 * 8703b and 8723d seem to use RTW_CCK_SWING_TABLE_SIZE, which is
    ++	 * -2dB on this chip.
    ++	 */
    ++	u8 limit_cck = 28;
     +	u8 limit_ofdm;
     +
     +	limit_ofdm = rtw8723x_pwrtrack_get_limit_ofdm(rtwdev);
    @@ drivers/net/wireless/realtek/rtw88/rtw8723b.c (new)
     +	.vht_supported = false,
     +	.lps_deep_mode_supported = 0,
     +	.sys_func_en = 0xfd,
    -+	.rcr = WLAN_RCR_CFG_8723B,
     +	.pwr_on_seq = card_enable_flow_8723b,
     +	.pwr_off_seq = card_disable_flow_8723b,
     +	.page_table = page_table_8723b,
6:  f71dba13271d = 5:  3d2fcd3eb4be wifi: rtw88: 8723bs: add the RTL8723BS SDIO bind
7:  d4cd7ae17a32 = 6:  360bbf9d0a6a wifi: rtw88: 8723bs: enable building the RTL8723BS driver